Field programmable memories are much more flexible in applications than mask ROMs due to their user programmable capabilities. However, field programmable memories are of generally lower density and of higher cost than mask ROMs for the circuitry to support their write/erase functions, and the more complicated scheme and large area consumption employed in their memory cells. Thus scale down and cost down are more important for the memory cells in a field programmable memory.
One approach to make compact memories is the self-aligned process for the memory cells to reduce the tolerance during the formation of the cell structure. Another is the multilevel programmability of the memory cells to increase the capacity in unit cell structure. Many prior arts are disclosed to obtain high-density nonvolatile memories. For example, U.S. Pat. No. 5,789,758 to Reinberg provides a multilevel chalcogenide memory cell with relatively large area chalcogenide electrodes on both sides of the active region of the chalcogenide memory cell to reduce the current density at the interface area between the top and bottom electrodes and the chalcogenide material so as for the current density and associated heating and electrophoretic effects are minimized. U.S. Pat. No. 6,077,729 to Harshfield improves the method for forming a chalcogenide memory array. Also, U.S. Pat. Nos. 5,970,336 and 6,153,890 to Wolstenholme et al. improve multilevel programmable memory incorporating a chalcogenide element as programmable resistor in the memory cell. However, these prior arts do not provide full self-aligned process and cell structure. U.S. Pat. No. 6,420,215 to Knall et al. uses rail-stacks in a three-dimensional memory array for multilevel programmability. However, this scheme makes the cell structure and the method to manufacture the memory array very complicated. Alternatively, U.S. Pat. Nos. 6,185,122 and 6,034,882 to Johnson et al. have maximum use of self-alignment technique to minimize photolithographic limitations for the programmable nonvolatile memory incorporating a state change element in the memory cell. However, the poly-oxide fuse used in this art for memory segment cannot be adopt for multilevel programmability. Such state or phase change element has been utilized for memory cells in nonvolatile memories for a long time, for example in U.S. Pat. No. 5,687,112 and RE37,259 to Johnson et al. and the U.S. Pat. Application in Ser. No. 10/108,658 filed on Mar. 28, 2002 of the coinventor now U.S. Pat. No. 6,579,760, attached hereto for reference. However, use of the phase change element for example with chalcogenides is hard to implement multilevel programmable nonvolatile memories. It is also hard to implement stable and good controllable memory states for memories. Therefore, there is a need to look for alternative programming mechanism for high density and low cost nonvolatile memories.